Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Lead or PrincipalPhysical Design Engineer to join our Memory Interface chip Design team in Agoura Hills, California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.   As a Lead or Principal Physical Design Engineer, the candidate will be reporting to the Sr. Director, Engineering and is a Full-Time position. Successful applicant will have highly visible role in product definition/design across Rambus sites.   Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work.

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Sr Analog/Mixed-Signal Design Engineer to join our Bufferchip Design team in Agoura Hills, California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.    As a Sr Analog/Mixed-Signal Design Engineer, the candidate will be reporting to the Sr. Director, Engineering and is a Full-Time position.Successful applicant will have highly visiblerole in product definition/design across Rambus sites.     Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work.

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Sr.Principal Analog Design Engineer to join our Bufferchip Design team in Agoura Hills, California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.    As a Sr.Principal Analog Design Engineer, the candidate will be reporting to the Sr. Director Engineering and is a Full-Time position.Successful applicant will have highly visiblerole in product definition/design across Rambus sites.    Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work.

Rambus, a premier chip and silicon IP provider, is seeking an exceptional Principal Digital Design Engineer to join our Buffer Chip Design team in Agoura Hills, California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.     As a Principal Digital Design Engineer, the candidate will be reporting to the Technical Director, Engineering in a Full-Time capacity.    Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work.

Rambus, a premier chip and silicon IP provider, is seeking an exceptional Principal Digital Design Engineer to join our Buffer Chip Design team in Agoura Hills, California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.     As a Principal Digital Design Engineer, the candidate will be reporting to the Technical Director, Engineering in a Full-Time capacity.    Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work.

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional PrincipalPMIC Validation/Application Engineering to join our Memory Interface team in San Jose California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.    As a Principal PMIC Validation/Application Engineering, the candidate will be reporting to Sr. Manager of Validation and is a Full-Time position. The engineer will work on developing a validation environment across bench/ATE and system performance specification compliance using our PMIC designs. The engineer will require experience in validation/characterization of the Power Management Devices (PMIC) with processor-memory interfaces, and protocols, as well as, power efficiency and integrity concepts. 

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Lead MTS Validation/Application Engineering to join our Memory Interface team in San Jose California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.    As a Lead MTS Validation/Application Engineering, the candidate will be reporting to Sr. Manager of Validation and is a Full-Time position. The engineer will work on developing a validation environment across bench/ATE and system performance specification compliance using our PMIC designs. The engineer will require experience in validation/characterization of the Power Management Devices (PMIC) with processor-memory interfaces, and protocols, as well as, power efficiency and integrity concepts. 

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional PE Security Engineeringto join our Silicon IPteam in San Francisco, CA or San Jose, CA. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. This senior engineer will coordinate our secure software development processes, analyze our current products for security vulnerabilities and compliance with relevant standards, participate in product certification activities, and play a key role in the security design for all of the products we develop in the future.     The successful candidate will demonstrate skills and interest in the theory & practice of secure development, testing, and validation and use those skills to influence our development practices across the business unit. To be successful this person will need to be comfortable accepting responsibility and working with a large team and across multiple disciplines and with teams in several Rambus development sites. A 'can-do' attitude is required for this role along with determination to continually improve our solutions. Your responsibilities will include oversight of our secure software QA process, development of threat models, development of countermeasures, ensure our products are in line with the latest security standards and processes, including certification standards, and identification of the best automated solutions for code analysis and testing.     As a PE Security Engineering, the candidate will be reporting to theDir Engineeringand is a Full-Time position.This engineer will work closely with other ASIC engineers and architects, as well as security, cryptography, verification and software engineers to architect, design, implement, and integrate digital hardware for the CryptoManager Root-of-Trust product, and Crypto Cores line of products, including Post-Quantum cores and those with DPA and FIA countermeasures. 

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Sr HR Business Partner to join our Human Resources team in our headquarters (San Jose, CA). Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.   As a Sr HR Business Partner, the candidate will be reporting to the Director of HR and is a Full-Time position. The candidate will be responsible for performing HR related duties on a professional level and work closely with HR Leadership in supporting a designated business group(s) as well as corporate HR initiatives.  This position carries out responsibilities and/or support in the following functional areas: onboarding/offboarding, performance management, employee relations, compensation, and training/development.    Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work.

Rambus, a premier chip and silicon IP provider, is seeking an exceptional Principal Digital Design Engineer to join our Buffer Chip Design team in Agoura Hills, California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.     As a Principal Digital Design Engineer, the candidate will be reporting to the Technical Director, Engineering in a Full-Time capacity. 

As Silicon IP Field Applications Engineer, Candidate will use his knowledge of memory, PCIe/CXL, MIPI PHYs/controllers to work with our current and future customers to help develop their ideas into reality.  Silicon IP FAE will have an opportunity to work across various market segments, and designs.FAE will be part of Sales Organization helping educate customers and provide solutions using our IP. 

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Firmware Engineerto join our Connectivity Business Unit team in North America. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.    The goal is to create scalable and optimized software systems. The candidate needs to be deeply hands-on and capable of working independently and in a team with experienced firmware engineers. The individual will execute the embedded software development lifecycle for firmware runningon ARM / RISCv CPUs and a Real-Time Operating System. The ideal individual will possess prior experience with electronics hardware – especially memory, and CPU interface integration IP within System-On-Chips (SoC). The candidate needs to have solid experience with embedded system bring-up, testing, and troubleshooting. The candidate will be expected to interact extensively in a tight team environment with employees in other disciplines and geographies.    Position location: Vancouver, BC 

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Senior ASIC Verification Engineer to join our Security team in Rotterdam. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.   As a Senior ASIC Verification Engineer, the candidate will be reporting to SPE Verification Engineering and is a Full Time position. This engineer will participate in the verification of secure ASIC cores developed by Rambus Security Division (RSD), working with cross functional teams including ASIC design engineers and architects, other verification engineers and system test engineers, security experts, and cryptographers. Cryptography and hardware security experience is not required, but an ability to, and interest in, learning about these areas is important.   Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work.

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Lead MTS Verification Engineer to join our CXL SOC Verification team in Bengaluru, India. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.   As a Lead MTS Verification Engineer, the candidate will be reporting to the Verification Manager and is a Full Time position. As a Functional verification engineer, you will be working on our next gen CXL based SOC used at Datacenters.   Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work.

Rambus, a premier chip and silicon IP provider, is seekingto hire an exceptional New College Gradto join our CXLteam in Montreal, Canada. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.     As an Associate Member of Technical Staff (AMTS),the candidate will be reporting to the Director of Verification Engineering. The candidate will be joining a team to work on cutting edgememory and silicon IP technology shaping the future of data centers and high-performance systems.    For this full-time position, Rambus offers a flexible work environment, embracing a hybrid approach. We encourage employees to spend an average of at least three days per week working onsite, allowing for two daysof remote work.  

Rambus, a premier chip and silicon IP provider, is seeking to hire several exceptional PMIC Test Engineers to join our Test Engineering team in San Jose, California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.    As a PMIC Test Engineer, the candidate will be reporting to Sr Mgr Test Engineering and is a full-time position. The PMIC Test Engineer will join a dynamic and multi-disciplinary team which will enable ATE test develop for products. This engineer will collaborate with a fast-paced internal cross-functional team to define characterization and cost sensitive production test solutions. There will be interaction with our overseas test subcontractors as well as delivering production wafer sort and/or final test solutions. Candidates for this position must be capable of working independently, defining technical direction, be self-motivated and a collaborative team player.    Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work.

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional PE to join our DFT MIC BU team in Bengaluru. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.   As an PE, the candidate will be reporting to DFT Manager and is in a Full-time position. The MIC BU DFT team is a high-performance team which delivers key DFT solutions to multiple mixed signal designs which cater to market and revenue driven memory interface chips at Rambus Technologies.

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Manager Logic Design to join our CXL SOC team in Bengaluru, India. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.   As a Logic Design Manager, the candidate will be reporting to the Director Engineering and is a Full-Time position. We are looking for a highly motivated techno manager to join a dynamic and multi-disciplinary team focused on the development of our CXL memory products.  We are looking for an experienced “hands on” manager who can lead our logic design team and integration, improve our processes, methodologies, infrastructure, and help to grow the team to a best-in-class position. In this role you will own the planning, design, and delivery of block-level RTL and contribute to top level RTL also for SoCs and ASICs from concept through to production release. The ideal candidate will possess a wide range of technical skills involved in design and integration of SoC products starting from initial product concept through to production release. The candidate should have comprehensive silicon design experience with a track record of successful tape-outs and first-pass success. The candidate will need to have outstanding organizational, communication, teamwork, debugging, and mentoring skills.   Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work.

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Sr. Principal Engineer with signal integrity and package design experience to join our Memory Interface Chips BU’s engineering team in San Jose, California. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.   As an SPE Signal Integrity, the candidate will be reporting to the VP of Engineering and is a Full Time position. In this highly visible role, the candidate will work within our SI/PI team to work on modeling, analysis, and simulations of signal integrity (SI) and power integrity (PI) in the very challenging DDR field with speed up to 12800+ MT/s.

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Lead MTS Layout Designto join our MIC Layout team in Bangalore. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.   As Lead MTS Layout Design, the candidate will be reporting to Layout Manager and is a Full-Time position. The MIC BU Layout team is a high-performance team gets involved in the complete development cycle starting with requirements, die area estimate, chip level floorplan, power, package discussions, execution of block level layouts, integration, physical verification, Database Transfer, e-Job review, and post-silicon support to multiple mixed signal designs which cater to market and revenue driven memory interface chips at Rambus Technologies.   Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work