• SMTS II - Applications Engineering

    Job Locations CA-Toronto | US-CA-Sunnyvale
    Job ID
  • Overview

    At Rambus, we are turning incredible possibilities into everyday reality by helping to deliver the innovations that greatly impact the world we live in. We create leading-edge semiconductor and IP products, spanning memory and interfaces to security to smart sensors and lighting. Our products are integrated into tens of billions of devices and systems around the globe, running critical applications for Big Data, Internet of Things (IoT), mobile, consumer and media platforms.




    As an Analog/Digital Applications Engineer in the Systems Innovation Group, you will be responsible for the assisting customers through successful technical integration of the Rambus physical layer IP into their chip, post silicon bring up and debugs. You will also work closely with R&D teams to collaborate on detailed technical Analog and Digital questions related to integration, verification and implementation of IP. You will analyze and resolve usage/implementation issues and provide timely, accurate technical guidance to customers. You will also be responsible for contributing to associated physical layer IP documentation such as user guides and application notes on specific implementation. You will have regular contact with external customers and internal teams across cross-functional teams. Occasional travel will be required.


    • Proactively engaging with customers technically from contract kickoff all the way to customer production
    • Analyze and resolve analog/digital issues and provide solutions in a customer friendly manner.
    • Work on customer chip bring up to ensure SERDES operates per specification.
    • Verilog simulations and verification debug of customer implementations.
    • Address static timing analysis questions during customer integration of the IP.
    • Assist in configuration of the IP to customize to a customer’s requirement.
    • Participate/Conduct customer tutorials and design reviews relating to IP integration.
    • Run system level simulations using industry standard simulator to analyze customer’s system level design.
    • Manage interaction between the customer and our layout team to address physical integration queries.
    • Assist on post silicon debugs and correlation issues between silicon and design. Working with the lab equipment to perform such co-relation and debug will be required.
    • Proactively work on documentation in the form of user guide/application notes to address customer integration questions. 
    • Perform lab demonstrations of the IP to potential customers.



    • Bachelors and/or Master’s Degree in Electrical and/or Electronic Engineering, Computer Engineering. 
    • 4+ years relevant experience in ASIC/SoC design including Verilog simulation flow, PnR flow, static timing analysis, back end flows, lab silicon debugs.
    • Domain knowledge of at least one of the following protocols is a plus
      • PCI Express – Gen2, Gen3.
      • SATA, SAS
      • KR, JESD, CPRI standards.
    • Silicon debug and troubleshooting skills are highly desirable. 
    • Strong communication skills and ability to interact with customers to understand how to best address requirements.
    • Technically creative, results oriented with the ability to manage multiple tasks efficiently including customer support issues and priorities. 
    • Adaptability to fast moving, changing environment with constant challenge. 
    • High degree of self-motivation and personal responsibility. 
    • Have the ability to work well within a team environment.


    Rambus offers an extremely competitive compensation package, which includes a strong base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program and gym membership.


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