Rambus is looking for a highly motivated Signal Integrity Engineer working on modeling, analysis, and simulations of signal integrity (SI) and power integrity (PI) of high-speed memory interfaces.
In this highly visible role, the candidate will create SI/PI methodologies and run simulations for the latest memory interfaces for our IP portfolio. These interfaces include the latest GDDR6 16Gig, DDR5 6.4Gig and HBM3.0 (and much more). You will work with our design team to define specifications and system design requirements such are packaging and PCB routings, IC-PKG-BRD decoupling requirements, channel simulations and jitter sensitivity analysis. You will help Rambus’ customers through the implementation of the IP and help application engineers during debug and bring up in lab if needed. You will have the opportunity to work on new memory initiatives, use your creativity to enable the industry for the next generation of IOs and SerDes which will enable the servers, autonomous cars, AI and networking.
Requirements:
10yrs, Masters