At Rambus, we are turning incredible possibilities into everyday reality by helping to deliver the innovations that greatly impact the world we live in. We create leading-edge semiconductor and IP products, spanning memory and interfaces to security to smart sensors and lighting. Our products are integrated into billions of devices and systems around the globe, running critical applications for Big Data, Internet of Things (IoT), mobile, and consumer platforms.
And our history runs deep – we have been a staple in Silicon Valley since 1990 and are continually anticipating key technology trends to develop innovations that drive market changes. From a pure IP provider to becoming a fabless chipmaker and developer of innovative software solutions, Rambus is evolving to address critical challenges throughout the industry.
As a dynamic organization, we are always seeking to hire exceptional talent to join some of the brightest inventors and engineers in the world to explore their passions to develop products that have real-life impact. As well, Rambus benefits are among the most comprehensive and competitive in the market today.
Our business is rooted in developing technologies and solutions that serve the needs of the market from the Data Center to the Mobile Edge. From our foundation in memory and interfaces, we leverage our history of high-speed circuit design leadership to create high-performance, low-power memory and serial link interface chips and IP cores to meet the needs of increasingly complex Data Center requirements.
This R&D engineering position will be responsible for interfacing to our silicon foundries and technically supporting design teams across the company working on product and IP development. Activities will include initial engagement on new nodes and developing comparative technology assessments, downloading and making available PDKs and EDA support files to CAD and design teams, providing design team support on DRC, ERC, DFM, ESD, and reliability rules and calculators, securing foundry provided IP and seeking 3rd party IP to fill any gaps, seeking answers when documentation or data is missing, seeking waivers when necessary and elucidating the risks, validating spice model and extraction setups and providing power, performance, area evaluations, coordinating mock and full tapeouts to foundry and being accountable for quality of delivery and checks, facilitating mask reviews, communicating foundry roadmaps and identifying foundry and node choices early in the product definition. This individual contributor will report to the Director of CAD and work closely with a broad set of design and functional teams including CAD engineers, design leads and engineers, and the operations team to consult on post-silicon issues. The position will require direct interaction with external foundry engineers and third-party design IP companies.
We are looking for an experienced technologist who can provide excellent and timely process, design rule manual, spice model, and PDK support to ensure internal projects and tapeouts remain on track and achieve their quality and performance goals. The candidate should be able to lead process roadmap, evaluation, and decision-making efforts. The candidate must be able to form symbiotic relationships with design engineering to seamlessly execute to the product roadmap. The candidate will need to have outstanding organization, communication, teamwork, and negotiating skills to ensure the teams are enabled for efficient and accurate execution on multiple product lines, simultaneously. Finally, the individual must be able to support and grow a strong and collaborative relationship with our foundries.