Assoc MTS - ASIC Verification Engineering

US-CA-Westlake Village
Job ID
2017-5957
Category
Engineering

Overview

At Rambus, we are turning incredible possibilities into everyday reality by helping to deliver the innovations that greatly impact the world we live in. We create leading-edge semiconductor and IP products, spanning memory and interfaces to security to smart sensors and lighting. Our products are integrated into tens of billions of devices and systems around the globe, running critical applications for Big Data, Internet of Things (IoT), mobile, consumer and media platforms.

And our history runs deep – we have been a staple in Silicon Valley for the past 25 years and are continually anticipating key technology trends and are developing innovations that drive market changes. From a pure IP provider to becoming a fabless chipmaker, Rambus is evolving to address critical challenges in the semiconductor industry.

As a dynamic organization, we are always seeking to hire exceptional talent to join some of the brightest inventors and engineers in the world to explore their passions to develop products that have real life impact. As well, Rambus benefits are among the most comprehensive and competitive in Silicon Valley.

Memory and interfaces are in our DNA. Leveraging over two decades of high-speed circuit design leadership, we make high-performance, low-power memory and serial link interface chips and IP cores to meet the needs of increasingly diverse enterprise and mobile applications. Featuring proven IP and advanced technology, our product families include server DIMM chipsets, R+ DDRn PHYs and R+ Serial Link PHYs.

Responsibilities

 

  • Team member, own block level verification.
  • Define block level verification and manage schedule and deliverables.
  • Work with digital design engineering to debug test cases in RTL and Gate Level simulation environment.
  • Post-silicon debug and correlation.

Qualifications

 

 

  • BSEE/MSEE with minimum 2/0 years of experience in verification of IC designs.
  • 1-2 years verification experience on block level.
  • Understanding entire verification flow. From planning, testbench creation, RTL/gate level simulations to coverage and signoffs.
  • SystemVerilog (VMM, OVM or UVM). UVM preferred.
  • Scripting perl/python for flow support.
  • Quick Learner.
  • Team player.
  • Good Communication skills.

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Rambus offers an extremely competitive compensation package, which includes a strong base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program and gym membership.

Rambus creates cutting-edge semiconductor and IP products, spanning memory and interfaces to security, smart sensors and lighting. Our chips, customizable IP cores, architecture licenses, tools, services, training and innovations improve the competitive advantage of our customers. We collaborate with the industry, partnering with leading ASIC and SoC designers, foundries, IP developers, EDA companies and validation labs. Our products are integrated into tens of billions of devices and systems, powering and securing diverse applications, including Big Data, Internet of Things (IoT), mobile, consumer and media platforms. At Rambus, we are makers of better. For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.

 

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