SMTS II - Circuit Design Engineering

US-CA-Westlake Village
Job ID


At Rambus, we are turning incredible possibilities into everyday reality by helping to deliver the innovations that greatly impact the world we live in. We create leading-edge semiconductor and IP products, spanning memory and interfaces to security to smart sensors and lighting. Our products are integrated into tens of billions of devices and systems around the globe, running critical applications for Big Data, Internet of Things (IoT), mobile, consumer and media platforms.

And our history runs deep – we have been a staple in Silicon Valley for the past 25 years and are continually anticipating key technology trends and are developing innovations that drive market changes. From a pure IP provider to becoming a fabless chipmaker, Rambus is evolving to address critical challenges in the semiconductor industry.

As a dynamic organization, we are always seeking to hire exceptional talent to join some of the brightest inventors and engineers in the world to explore their passions to develop products that have real life impact. As well, Rambus benefits are among the most comprehensive and competitive in Silicon Valley.

Memory and interfaces are in our DNA. Leveraging over two decades of high-speed circuit design leadership, we make high-performance, low-power memory and serial link interface chips and IP cores to meet the needs of increasingly diverse enterprise and mobile applications. Featuring proven IP and advanced technology, our product families include server DIMM chipsets, R+ DDRn PHYs and R+ Serial Link PHYs.


The primary focus of the position will be technical lead, transistor-level design, simulation, and characterization of high performance PLL/DLLs and clocking architecture. The position also involves design of low power mixed-signal IO circuits in CMOS including transmitters, receivers, voltage regulators, ESD, equalizers, crosstalk cancellation and etc. The design/verification of these components requires both analog and digital circuit expertise.



  • Candidate will lead the team through all phases of development including specification, design, verification, silicon evaluation, and will be responsible for schematic and layout of sub-systems of the chip.
  • Candidate will work with layout engineers and circuit designers to develop DDR memory buffer chips.
  • Candidate will also need to model components and predict system performance using self-built and industry standard tools.
  • Candidate will be called upon to develop new tools, scripts, and design flows to more thoroughly verify/validate designs including co-simulation of analog/digital interfaces.
  • Other responsibilities include layout supervision, writing documentation, customer interaction and preparing, presenting and evaluating peer design reviews.




    • MSEE/Ph.D. with 5+ years of analog / mixed-signal circuit design experience on chip products is required. 
    • Candidate must have designed critical circuit blocks in at least 2 high-speed (>4Gbps) IO circuits (or other circuit of equivalent complexity) which were put into production. Direct chip design experience in DDR/SERDES product is a strong plus.
    • Requires experience with the following tools: Hspice/Spectre and HspiceRF/SpectreRF, Verilog-A, LVS/DRC verification, schematic capture and shell scripting.
    • Specific knowledge or experience with DDR/SERDES is highly desirable. Working knowledge of communication theory, control theory, power and signal integrity, equalization techniques, and noise analysis is recommended.
    • Experience with Verilog coding is a strong plus.
    • Low power and low noise design, design for manufacturability, design for testing, Silicon debug experiences are also desirable.
    • Excellent oral and written presentations skills are required for team presentations, as well as customer interaction and reviews.
  • Must be a team player with good written and verbal communication skills, self-motivated, thorough design styles, detail oriented, and work with multiple functional teams with good engineering practices.




Rambus offers an extremely competitive compensation package, which includes a strong base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program and gym membership.

Rambus creates cutting-edge semiconductor and IP products, spanning memory and interfaces to security, smart sensors and lighting. Our chips, customizable IP cores, architecture licenses, tools, services, training and innovations improve the competitive advantage of our customers. We collaborate with the industry, partnering with leading ASIC and SoC designers, foundries, IP developers, EDA companies and validation labs. Our products are integrated into tens of billions of devices and systems, powering and securing diverse applications, including Big Data, Internet of Things (IoT), mobile, consumer and media platforms. At Rambus, we are makers of better. For more information about Rambus, visit For additional information on life at Rambus and our current openings, check out


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