SMTS II,Applications Engineering

IN-KA-Bangalore
Job ID
2017-5563
Category
Engineering

Responsibilities

Description 

As an Analog/Digital Applications Engineer in the Systems Innovation Group, you will be responsible for the assisting customers through successful technical integration of the Rambus physical layer IP into their chip, post silicon bring up and debugs. You will also work closely with R&D teams to collaborate on detailed technical Analog and Digital questions related to integration, verification and implementation of IP. You will analyze and resolve usage/implementation issues and provide timely, accurate technical guidance to customers. You will also be responsible for contributing to associated physical layer IP documentation such as user guides and application notes on specific implementation. You will have regular contact with external customers and internal teams across cross-functional teams. Occasional travel will be required.
 

Responsibilities Include

  • Proactively engaging with customers technically from contract kickoff all the way to customer production
  • Analyze and resolve analog/digital issues and provide solutions in a customer friendly manner.
  • Work on customer chip bring up to ensure SERDES operates per specification.
  • Verilog simulations and verification debug of customer implementations.
  • Address static timing analysis questions during customer integration of the IP.
  • Assist in configuration of the IP to customize to a customer’s requirement.
  • Participate/Conduct customer tutorials and design reviews relating to IP integration.
  • Run system level simulations using industry standard simulator to analyze customer’s system level design.
  • Manage interaction between the customer and our layout team to address physical integration queries.
  • Assist on post silicon debugs and correlation issues between silicon and design. Working with the lab equipment to perform such co-relation and debug will be required.
  • Proactively work on documentation in the form of user guide/application notes to address customer integration questions. 
  • Perform lab demonstrations of the IP to potential customers.

Qualifications

Education and Experience

  • Bachelors and/or Master’s Degree in Electrical and/or Electronic Engineering, Computer Engineering. 
  • Must have 3 to 5 years of solid work experience in Product Application Engineering & Silicon Validation. (Preferably SERDES/Memory)
  • Experience in ASIC/SoC design including Verilog simulation flow, PnR flow, static timing analysis, back end flows will be a plus.
  • Domain knowledge of at least one of the following protocols is a plus
    • PCI Express – Gen2, Gen3.
    • SATA, SAS
    • KR, JESD, CPRI standards.
    • Memory DDR/LPDDR 2,3,4
  • Silicon debug and troubleshooting skills are highly desirable. 
  • Strong communication skills and ability to interact with customers to understand how to best address requirements.
  • Technically creative, results oriented with the ability to manage multiple tasks efficiently including customer support issues and priorities. 
  • Adaptability to fast moving, changing environment with constant challenge. 
  • High degree of self-motivation and personal responsibility. 
  • Have the ability to work well within a team environment.

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